Learning Reduced Order Dynamics via Geometric Representations
Imran Nasim, Melanie Weber
SCML 2024
Current temperatures for the growth of epitaxial silicon films for device applications are in the range of 1050°-1200°C using commercially available CVD reactors. However, the demand for submicron epitaxial layers with abrupt dopant profiles for high performance integrated circuit applications as well as the evolution of mixed technologies and three-dimensional device structures have generated a strong need for reduced temperature epitaxy in the temperature region at or below 800°C. Several approaches to achieve this are currently under investigation, and these include thermal prebake, plasma-enhanced epitaxy, chemically enhanced epitaxy, and ultrahigh vacuum processing. In this paper, we review these techniques and consider the limits to low temperature CVD silicon epitaxy. © 1987, The Electrochemical Society, Inc. All rights reserved.
Imran Nasim, Melanie Weber
SCML 2024
Robert W. Keyes
Physical Review B
M.A. Lutz, R.M. Feenstra, et al.
Surface Science
R.J. Gambino, N.R. Stemple, et al.
Journal of Physics and Chemistry of Solids