The high electron injection phenomenon of Si-rich SiO2 films deposited on top of SiO2 can be used for novel charge trapping studies of sites normally present or purposely introduced in the SiO 2. From the position and extent of current ledges observed in dark current as a function of ramped gate voltage, the capture cross section and total number of traps can be determined. Using these measurements with capacitance as a function of gate voltage, the trap distribution centroid and number of trapped charges can also be found. Several experimental examples are given including trapping in thermal SiO2, in chemically vapor deposited (CVD) SiO2, and on W, less than a monolayer thick, sandwiched between thermal and CVD SiO2. These stepped insulator metal-insulator-silicon (SI-MIS) ramp I-V results for the trapping parameters are shown to be in good agreement with those determined using the conventional photo I-V and avalanche injection with flat-band voltage tracking techniques. A numerical simulation of the ramp I-V measurements, assuming electric field-enhanced Fowler-Nordheim tunneling at the Si-rich-SiO2-SiO 2 interface, is described and is shown to give good agreement with the experimental data. These techniques for SI-MIS structures are faster and easier, although less accurate than the conventional techniques.