Failure diagnosis with incomplete information in cable networks
Yun Mao, Hani Jamjoom, et al.
CoNEXT 2006
This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic systems enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.
Yun Mao, Hani Jamjoom, et al.
CoNEXT 2006
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
Thomas M. Cheng
IT Professional
B.K. Boguraev, Mary S. Neff
HICSS 2000