Publication
IEEE T-ED
Paper

An Optimal NOR Logic Element Using Nonlinear Resistance

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Abstract

The design procedures for a NOR logic element using a nonlinear collector resistor are described. The nonlinear collector resistor is used as a means for reducing dissipation over a linear resistor with the same fan-out capability. The nonlinear resistor is combined with a standard transistor-resistor logic gate to reduce the effects of two of the undesirable characteristics of this type of logic, namely, high dissipation and slow transient response. In the analysis an expression for fan-out is developed to determine base network resistances. Typical design examples are described with calculations made for MOS-type current limiters. Circuits were constructed and tested to verify these calculations. Copyright © 1970 by The Institute of Electrical and Electronics Engineers, Inc.

Date

01 Jan 1970

Publication

IEEE T-ED

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