About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IEEE TC
Paper
A scalable dual-field elliptic curve cryptographic processor
Abstract
We propose an elliptic curve (EC) cryptographic processor architecture that can support Galois fields GF(p) and GF(2n) for arbitrary prime numbers and irreducible polynomials by introducing a dual field multiplier. A Montgomery multiplier with an optimized data bus and an on-the-fly redundant binary converter boost the throughput of the EC scalar multiplication. All popular cryptographic function such as DSA, EC-DSA, RSA, CRT, and prime generation are also supported. All commands are organized in a hierarchical structure according to their complexity. Our processor has high scalability and flexibility between speed, hardware area, and operand size. In the hardware evaluation using a 0.13-μm CMOS standard cell library, the high-speed design using 117.5 Kgates with a 64-bit multiplier achieved operation times of 1.21 ms and 0.19 ms for a 160-bit EC scalar multiplication in GF(p) and GF(2n), respectively. A compact version with an 8-bit multiplier requires only 28.3K gates and executes the operations in 7.47 ms and 2.79 ms. Not only 160-bit operations, but any length can be supported by any hardware configuration so long as the memory capacity is sufficient.