Stefano Grivet-Talocia, Hao-Ming Huang, et al.
IEEE Transactions on Advanced Packaging
This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists.
Stefano Grivet-Talocia, Hao-Ming Huang, et al.
IEEE Transactions on Advanced Packaging
Jason Morsey, Alina Deutsch, et al.
IEEE Transactions on Advanced Packaging
Yulei Zhang, Xiang Hu, et al.
SLIP 2009
Nickolas J. Mazzeo, Ian L. Sanders, et al.
IEEE Transactions on Magnetics