About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IEEE Transactions on Advanced Packaging
Paper
A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis
Abstract
This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists.