A functional FinFET-DGCMOS SRAM cell

Abstract

An operational six-transistor SRAM cell is experimentally demonstrated using Double Gate CMOS FinFET technology. A cell size of 4.8μm2 was achieved in 180nm node technology, with stable operation at 1.5V using a single level of copper interconnect. To our knowledge this represents the first experimental demonstration of a fully integrated FinFET SRAM Cell.