Ultra low power 10- to 25-Gb/s CMOS-driven VCSEL links
Jonathan E. Proesel, Clint L. Schow, et al.
OFC/NFOEC 2012
This letter reports on the room temperature operation of a conventional SiGe bipolar ECL ring oscillator with a minimum stage delay of 4.2 ps for ∼250 mV single ended voltage swing. To our knowledge, this is the lowest reported delay for a gate fabricated using transistor devices. The circuit uses 0.12 × 2 μm 2 emitter size SiGe n-p-n transistors with a room temperature f T of 207 GHz and f MAX (unilateral gain extrapolation) of 285 GHz. The ring oscillator was studied as a function of various device and circuit parameters and it was found that minimum delay is more dependent on the parasitic resistance and capacitance in the n-p-n device than on pure transit time across the device.
Jonathan E. Proesel, Clint L. Schow, et al.
OFC/NFOEC 2012
Fuad E. Doany, Daniel M. Kuchta, et al.
ECTC 2014
Sungjae Lee, Jonghae Kim, et al.
VLSI Technology 2007
Greg Freeman, Mounir Meghelli, et al.
IEEE Journal of Solid-State Circuits