A 23-ps/2.1-mW ECL Gate with an AC-Coupled Active Pull-Down Emitter-Follower Stage

Abstract

An emitter-coupled logic (ECL) gate with an ac-coupled active pull-down emitter-follower stage that gives high speed at lower power is described. Significant reduction of the speed-power product can be achieved over the conventional ECL gate. The speed/power advantages of the circuit have been demonstrated in a double-poly, trench-isolated, self-aligned bipolar process with 0.8-μm (mask) emitter width. Unloaded gate delays of 21 ps at 4.1 mW/gate, 23 ps at 2.1 mW/gate, and 35 ps at 1.1 mW/gate have been measured. © 1989 IEEE