A 14-gops programmable motion estimator for H.26X video coding

Abstract

A 14 Giga operations per second (Gops) programmable motion estimator chip is developed to support multiple algorithms and video coding standards. The chip performs multisurvivor motion estimation in the subsampled scan and the cluster search mode. The chip uses a dual-addressing single-port memory and a pel-rotating processing element array to implement synchronous self-aligned block difference computation. The chip is implemented in 0.5-μm CMOS achieving 86.4 million operations per second (Mops)/KXtr and 21 mW/Gop. The chip delivers full search quality for H.26X coding at CIF 30 f/s, near full search quality at NTSC level, and a wide range of other video quality and resolution tradeoffs.