Publication
OFC 2017
Conference paper

System-level demonstration of a dynamically reconfigured burst-mode link using a nanosecond Si-photonic switch

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Abstract

Using a novel FPGA-based network emulator, microsecond-scale packets with 12.5-20-Gb/s data are generated, routed through a nanosecond Si-photonic switch, and received in a fast-locking burst-mode receiver. Error-free links with < 382-ns system-level switching are shown.

Date

11 Mar 2017

Publication

OFC 2017

Authors

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